With a display device that uses current drive type light emitting elements, such as an OLED, power supply lines are normally arranged inside a pixel region, driving elements and elements to be driven, such as the OLED, are connected between the power supply lines, and a desired display image is obtained by controlling the conductance of the driving elements. In the case of using a transistor as a drive element (driving transistor), the source terminal of that driving transistor is connected to one power supply, and by applying a voltage corresponding to display data to the gate terminal of the driving transistor a current corresponding to the voltage across the gate and source of the driving transistor is supplied to the OLED, being a driven element, and a desired display image is obtained.
FIG. 1 shows the overall structure of a display device of the related art. Unit pixels (pixels) 2 are arranged in a matrix shape in a pixel region 1. Scan lines 3 are arranged in correspondence with each row of pixels 2, and signal lines 4 and power supply lines 5 are provided in correspondence with each column of unit pixels 2. The scan lines 3 are driven by a scan line driving circuit 6, the signal lines 4 are driven by a signal line driving circuit 7, and the power supply lines 5 are driven by a power supply voltage circuit 8.
In response to signals from a control circuit 9 the scan line drive circuit 6 selects one scan line, and the signal line drive circuit 7 supplies a signal for the pixel being selected to the signal line 4. By repeating this, signals corresponding to each pixel are written. A power supply voltage is always supplied to the power supply lines 5.
FIG. 2A shows a representative pixel circuit for the case of a P-type transistor as the driving transistor. One end of a switch SW1 formed by a transistor is connected to the signal line 4, and the other end of the switch SW1 is connected to a gate terminal of a driving transistor TDR. The source of the driving transistor TDR is connected to a power supply line 5 that supplies a power supply voltage Vdd. Here, the resistor RL is the wiring resistance of the power supply line 5. Also, a data holding capacitor Cs is connected between the source and gate of the driving transistor TDR, and the drain of the driving transistor TDR is connected to an anode of an OLED. The cathode of the OLED is connected to ground etc., being a low voltage power supply.
As a result, a voltage corresponding to Vdd−Vdata is written to the data holding capacitor Cs by turning the switch SW1 on, a current corresponding to Vdata flows in the driving transistor TDR, and the OLED emits light using that current.
If the current flowing in the power supply line 5 is large, variation arises in the power supply voltage Vdd due to the resistance of the power supply line 5. Since the voltage stored in the data holding capacitor Cs at this time is lowered, the emission brightness of the pixel is lower than the intended brightness. In order to deal with this type of problem, a conventional method has aimed to reduce variation in the voltage of the power supply line itself. In order to reduce voltage variation in the power supply line, it has been considered to lower the resistance of the power supply line itself (for example, JP 2007-241302), or to turn off the flow of current in the driving transistor in a pixel selection period (for example, U.S. Patent Application Publication No. 2007/0128583).
With the method of patent document 1 described above, there can be a limit to the lowering of the resistance value of the power supply line, which basically has no solution. Also, with the method of U.S. Patent Application Publication No. 2007/0128583, since the source electrode of the driving transistor is floating during the pixel selection period, it is difficult to accurately write a signal voltage across the gate and source of the driving transistor.